LMT121DNGFWD
LCD Module User Manual
Prepared by:
Checked by:
Approved by:
Zhang Yu
Date: 2014-11-13
Date:
Date:
Rev. Descriptions
Release Date
0.1
Preliminary
2014-11-13
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LMT121DNGFWD
Table of Content
1. General Specification .................................................................................................................... 3
2. Block Diagram ................................................................................................................................ 3
3. Input/Output Terminals .................................................................................................................. 4
3.1 K1 TFT Terminals................................................................................................................................................................ 4
3.2 K2 BackLight Terminals ...................................................................................................................................................... 4
4. Absolute Maximum Ratings .......................................................................................................... 5
5. Electrical Characteristics .............................................................................................................. 5
5.1 Driving TFT LCD Panel ....................................................................................................................................................... 5
5.2 LED Backlight Circuit Characteristics .................................................................................................................................. 6
5.3 Power supply voltage Sequence ......................................................................................................................................... 6
6. AC Characteristics ......................................................................................................................... 7
6.1 Input data mapping.............................................................................................................................................................. 7
6.2 Timing Characteristics ......................................................................................................................................................... 8
6.3 Input signal timing chart ...................................................................................................................................................... 9
7. Optical Characteristics ................................................................................................................ 10
8. Precautions of using LCD Modules ............................................................................................ 12
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1. General Specification
Signal Interface :
LVDS
Display Technology :
a-Si TFT active matrix
Display Mode :
TN Type Full Color / Transmissive / Normal White
Screen Size :
12.1 inch (Diagonal)
Outline Dimension :
279.0x209.0x9.0 (mm)
(see Outline DWG for details)
Active Area :
245.76 x184.32 (mm)
Number of dots :
1024 x 768
Dot Pitch :
0.240 x 0.240(mm)
Pixel Configuration :
R.G.B. Vertical Stripe
Backlight :
White LED
Surface Treatment :
Anti-Glare
Viewing Direction :
6 o’clock
Operating Temperature :
-20 ~ +70°C
Storage Temperature :
-30 ~ +80°C
2. Block Diagram
BLVCC, BLGND
Backlight Circuit
BLEN, BLADJ
1024 x 768 pixels
GND
VCC
Source Driver
RIN0+,RIN0-, RIN1+,RIN1-
RIN2+,RIN2- ,RIN3+,RIN3-
LVDS interface
CLKIN+,CLKIN-
DPS, FRC
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3. Input/Output Terminals
3.1 K1 TFT Terminals
Pin No. Pin Name
IO
Descriptions
24Bit Mode
18Bit Mode
1
2
VCC
Power
Power Supply
3
GND
Power
Ground
4
FRC
Input
H:8Bits LVDS Input
L/NC: 6Bits LVDS Input
(24bit mode)
(18bit mode)
5
RIN0-
Input
LVDS receiver negative signal channel 0
6
RIN0+
Input
LVDS receiver positive signal channel 0
7
GND
Power
Ground
8
RIN1-
Input
LVDS receiver negative signal channel 1
9
RIN1+
Input
LVDS receiver positive signal channel 1
10
GND
Power
Ground
11
RIN2-
Input
LVDS receiver negative signal channel 2
12
RIN2+
Input
LVDS receiver positive signal channel 2
13
GND
Power
Ground
14
CLKIN-
Input
LVDS receiver negative signal clock
15
CLKIN+
Input
LVDS receiver positive signal clock
16
GND
Power
Ground
17
RIN3-
Input
LVDS receiver negative signal channel 3.(Used for 8Bits
LVDS Input; GND for 6Bits)
18
RIN3+
Input
LVDS receiver positive signal channel 3.(Used for 8Bits
LVDS Input; GND for 6Bits)
19
DPS
Input
Display Reversed Function
(H: Display Reverse; L/NC: Normal Display)
20
NC
--
No Connection
3.2 K2 BackLight Terminals
Pin No. Pin Name
IO
Descriptions
1
NC
-
No Connection
2
BLADJ
Input
Backlight dimming control
PWM may be used to adjust the output brightness
Backlight Driver Control
3
BLEN
Input
BLEN=Hi, Backlight Driving Booster enable
BLEN=Lo, Backlight Driving Booster disable
4
BLGND
Power
Power Supply GND (0V)
5
BLVCC
Power
Positive Power Supply
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4. Absolute Maximum Ratings
GND=0V, T OP =25  C
Items
Symbol Rating
Unit
Remarks
LCD panel signal processing
Power supply
VCC
-0.3 to +3.96
board
voltage
V
LED driver
BLVCC -0.3 to (+15.0)
Display signals ,Note1
VD
-0.5 to 3.96
V
Ta= 25 ℃
Input voltage for
Function signals ,Note2
VF
-0.5 to 3.96
signals
BLADJ -0.3 to (+15.0)
V
Function signal for LED driver
BLEN
-0.3 to (+15.0)
V
Storage temperature
Tst
-30 to +80
-
Front surface
TopF
-20 to +70
Note3
Operating temperature
Rear surface
TopR
-20 to +70
Note4
Relative humidity
 90
%
Ta ≤ 40 ℃
RH
Note5
 85
%
40 ℃ < Ta ≤ 50 ℃
Absolute humidity ,Note5
AH
70,Note6
g/m3
Ta > 50 ℃
Note1:RIN0±,RIN1±,RIN2±,RIN3± and CLKIN±;
Note2:DPS and FRC;
Note3:Measured at LCD panel surface (including self-heat);
Note4:Measured at LCD module's rear shield surface (including self-heat);
Note5:No condensation;
Note6:Water amount at Ta= 50°C and RH= 85%.
5. Electrical Characteristics
5.1 Driving TFT LCD Panel
GND=0V, VCC=3.3V, T OP =25  C
Items
Symbol
MIN.
TYP.
MAX.
Unit
Note
Power supply voltage
VCC
3.0
3.3
3.96
V
Power supply current
ICC
-
300
480
mA
*1
Permissible ripple voltage
VRP
-
-
300
mV
Differential input threshold
VTL
-100
-
-
mV
VCM=1.25V,*2
voltage for LVDS receiver
VTH
-
-
100
mV
Terminating resistor
RT
-
100
-
Ω
Input voltage for DPS
VFH
0.7VCC
-
VCC
V
and FRC signals
VFL
0
-
0.3VCC
V
*1: All black pattern
*2: Common mode voltage for LVDS receiver
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5.2 LED Backlight Circuit Characteristics
BLGND=0V ,T OP =25  C
Parameter
Symbol
MIN.
TYP.
MAX.
Unit
Note
Power supply voltage
BLVCC
10.8
12.0
12.6
V
Note 1
Power supply voltage
I BLVCC
-
430
650
At the maximum
Note2
mA
luminance control
Permissible ripple voltage
VRPD
-
-
200
mVp-p For BLVCC,Note3
VDFH1
Input voltage for PWM signal
2.0
-
BLVCC
V
VDFL1
0
-
0.8
V
VDFH2
Input voltage for BLEN signal
2.0
-
BLVCC
V
VDFL2
0
-
0.8
V
PWM Input Frequency
f PWM
200
-
20k
Hz
Note4,Note5
PWM duty ratio
DR PWM
1
-
100
%
PWM pulse width
tPWH
5
-
-
us
Note6,Note7
Note1:When designing of the power supply ,take the measures for the prevention of surge voltage.
Note2:This value excludes peak current such as overshoot current.
Note3:This power supply lines(BLVCC and GND)may have ripple voltage during luminance control of
LED.There is the possibility that the ripple voltage produces acoustic noise and signal wave
noise in audio circuit and so on.Put a capacitor between the power supply lines(BLVCC and
GND) to reduce the noise is necessary .
Note4:A recommended fPWM value is as follows.
2n-1
f PWM =
× fv
4
(n =integer,fv =frame frequency of LCD module )
Note5:Depending on the frequency used ,some noise may appear on the screen,please conduct a
thorough evaluation,
Note6:While the BLEN signal is high ,do not set the tPWH(PWM pulse width ) is less than 5us .It may
cause abnormal working is the backlight .In this case,turn the backlight off and then on again by
BLEN signal.
Note7:Regardless of the PWM frequency,both PWM duty radio and PWM pulse width must be always
more than the minimum values.
5.3 Power supply voltage Sequence
5.3.1 LCD panel signal processing board
Note1: If there is a voltage variation(voltage drop) at the rising edge of VCC below 3.0V,there is a
possibility that a product does not work due to a protection circuit.
Note2: Display signals ( RIN0±,RIN1±,RIN2±,RIN3± and CLKIN± ) and function signals(DPS and FRC) must
be set to Low or High-impedance, except the VALID period (See above sequence diagram),in
order to avoid the circuitry damage .If some of display and function signals of this product are cut
while this product is working, even if the signal input to it once again, it might not work normally. If a
customer stops the display and function signals, VCC also must be shut down.
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5.3.2 LED Driver
Note1:These are the display and function signals for LCD panel signal processing board.
Note2:The backlight should be turned on within the valid period of display and function signals,in order to
avoid unstable data display.
6. AC Characteristics
6.1 Input data mapping
6.1.1 LVDS Input data signal:8-bit
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6.1.2 LVDS Input data signal:6-bit
6.2 Timing Characteristics
(Note1,Note2,Note3)
Parameter
Symbol MIN.
TYP.
MAX. Unit
Remarks
Frequency
1/tc
52.0
65.0
71.0
MHz 15.385ns (typ.)
CLK
Duty ratio
-
-
-
-
Rise time, Fall time
-
ns
Setup time
-
ns
CLK-DATA
-
DATA
Hold time
-
-
ns
Rise time, Fall time
-
ns
-
16.542 20.676 26.88
us
Cycle
th
48.363kHz (typ.)
Horizontal
1114
1344
1400
CLK
Display period
thd
1024
CLK
-
13.34 16.666 20.0
ms
Vertical
Cycle
tv
DE
(One frame)
780
806
845
H
60.0Hz (typ.)
Display period
tvd
768
H
Setup time
-
ns
CLK-DE
-
Hold time
-
-
ns
Rise time, Fall time
-
ns
-
Note1:Definition of parameter is as follows.
tc = 1CLK , th = 1H
Note2:See the data sheet of LVDS transmitter.
Note3:Vertical cycle (tv) should be specified in integral multiple of Horizontal cycle (th).
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6.3 Input signal timing chart
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7. Optical Characteristics
(Note*1,*2)
Measuring
Parameter
Condition
Symbol min.
typ.
max.
Unit
instrument
Remarks
White at center
Luminance
-
cd/m2 BM-5A
 R= 0  ,  L= 0  ,  U= 0  ,  D= 0 
L
300
450
-
White/Black at center
Contrast ratio
 R= 0  ,  L= 0  ,  U= 0  ,  D= 0 
CR
500
700
-
-
BM-5A
Note3
White
Luminance uniformity
 R= 0  ,  L= 0  ,  U= 0  ,  D= 0 
LU
-
1.25
(1.33)
-
BM-5A
Note6
x coordinate
Wx
0.263 0.313 0.363
-
White
y coordinate
Wy
0.279 0.329 0.379
-
x coordinate
Rx
-
TBD
-
-
Red
y coordinate
Ry
-
TBD
-
-
x coordinate
Gx
-
TBD
-
-
Chromaticity
Green
y coordinate
Gy
-
TBD
-
-
x coordinate
Bx
-
TBD
-
-
SR-3
Note5
Blue
y coordinate
By
-
TBD
-
-
 R= 0  ,  L= 0  ,  U= 0  ,  D= 0 
Color gamut
at center, against NTSC color space
C
48
55
-
%
White to Black
Ton
-
(3)
(5)
ms
BM-5A
Note4
Response time
Black to White
Toff
-
(5)
(8)
ms
-10000
Right
 U= 0  ,  D= 0  , CR  10
 R
70
80
-

Left
 U= 0  ,  D= 0  , CR  10
 L
70
80
-

EZ
Viewing angle
Up
 R= 0  ,  L= 0  , CR  10
 U
70
80
-

Note2
Contrast
Down
 R= 0  ,  L= 0  , CR  10
 D
70
80
-

Note:
*1. The value above are initial Characteristics.
* 2: Measurement conditions are as follows.
Ta= 25 ℃ , VCC= 3.3V, VDD= 12.0V, PWM duty ratio: 100%,
Display mode: XGA, Horizontal cycle= 1/48.363kHz, Vertical cycle= 1/60.0Hz,
DPS= Low or Open: Normal scan, FRC= High
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Note 1:
Note 2:
The data are measured after LEDs are turned on for 5 minutes.
The definition of viewing angle:
LCM displays full white. The brightness is the average value of 9 Refer to the graph below marked by θ and Ф
measured spots. Measurement equipment SR-3A (1°)
Measuring condition:
- Measuring surroundings: Dark room
- Measuring temperature: Ta=25 ℃ .
- Adjust operating voltage to get optimum contrast at
the center of the display.
Note 3:
The definition of contrast ratio (Test LCM using SR-3A (1°)):
Note 4:
Contrast
Luminance When LCD is at “White” state
Definition of Response time. (Test LCD using BM-7A(2°)):
Ratio(CR)
=
Luminance When LCD is at “Black” state
The output signals of photo detector are measured
(Contrast Ratio is measured in optimum common electrode
when the input signals are changed from
voltage)
“black” to “white”(falling time)
and from “white” to “black”(rising time), respectively.
The response time is defined as
the time interval between the 10% and 90% of amplitudes.Refer to
figure as below.
Note 5:
Note 6:
Definition of Color of CIE1931 Coordinate and NTSC Ratio.
The luminance uniformity is calculated by using following formula.
△ Bp = Bp (Min.) / Bp (Max.)×100 (%)
Color gamut:
Bp (Max.) = Maximum brightness in 9 measured spots
Area of RGB triangle
S=
X100%
Bp (Min.) = Minimum brightness in 9 measured spots .
Area of NTSC triangle
Note 7:
Measured the luminance of white state at center point
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8. Precautions of using LCD Modules
Please refer to "LCD-Module-Design-Handling-Precaution.pdf".
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